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 Freescale Semiconductor Technical Data
Document Number: MPXY8021A Rev 2, 02/2006
Tire Pressure Monitoring Sensor Temperature Compensated and Calibrated, Fully Integrated, Digital Output
The Freescale Semiconductor, Inc. MPXY8021A sensor is an 8-pin tire monitoring sensor which is comprised of a variable capacitance pressure sensing element, a temperature sensing element, and an interface circuit (with a wake-up feature) all on a single chip. It is housed in a Super-Small Outline Package (SSOP), which includes a media protection filter. Specifically designed for the low power consumption requirements of tire pressure monitoring systems, it can combine with a Freescale remote keyless entry (RKE) system to facilitate a low-cost, highly integrated system. DETAILED DESCRIPTION The block diagram of the MPXY8021A sensor is shown in Figure 1. The pressure sensor is a capacitive transducer constructed using surface micromachining, the temperature sensor is constructed using a diffused resistor, and the interface circuit is integrated onto the same die as the sensors using a standard silicon CMOS process. The conditioning of the pressure signal begins with a capacitance to voltage conversion (C to V) followed by a switched capacitor amplifier. This amplifier has adjustable offset and gain trimming. The offset and gain are factory calibrated, with calibration values stored in the EEPROM trim register. This amplifier also has temperature compensation circuits for both sensitivity and offset, which also are factory adjusted using the EEPROM trim register. The pressure is monitored by a voltage comparator, which compares the measured value against an 8-bit threshold adjusted by a serial input. By adjusting the threshold and monitoring the state of the OUT pin the external device can check whether a low-pressure threshold has been crossed, or perform up to 8-bit A/D conversions. The temperature is measured by a diffused resistor with a positive temperature coefficient driven by a current source, thereby creating a voltage. The room temperature value of this voltage is factory calibrated using the EEPROM trim register. A two-channel multiplexer can route either the pressure or temperature signal to a sampling capacitor that is monitored by a voltage comparator with variable threshold adjust, providing a digital output for temperature. An internal low frequency, low power 5.4 kHz oscillator with a 14-stage divider provides a periodic pulse to the OUT pin (divide by 16384 for 3 seconds). This pulse can be used to wake up an external MCU to begin an interface with the device. An additional 10-stage divider will provide a pulse every 52 minutes which can be used to reset an external MCU. The power consumption can be controlled by several operational modes selected by external pins.
MPXY8021A
TIRE PRESSURE MONITORING SENSOR MPXY8021A: OPTIMIZED FOR 250 kPA - 450 kPA
SUPER SMALL OUTLINE PACKAGE CASE 1352-03
PIN ASSIGNMENT
S1NPP 1 VDD 2 VSS 3 OUT 4
8 7 6 5
SO CLK DATA RST
8-pin Super Small Outline Package (SSOP)
ORDERING INFORMATION
Shipped in Rails MPXY8021A6U Shipped in Tape & Reel MPXY8021A6T1
(c) Freescale Semiconductor, Inc., 2006. All rights reserved.
VDD PX Clock Gen fHF Internal HF OSC. Power Control PREF C to V Convert Digital Control S1 S0 Data CLK
AMP Internal LF OSC.
P-Cell
P-Off Trim
P-Gain Trim
P-TCO Trim
P-TCS Trim
f LF 14-Stage Divider Lock 10-Stage |Divider
T-Off Trim
8-Bit Current Source 2-Chan MUX
8-Bit D/A Register
RST
2-Chan MUX t PTC Res. AVSS
COMP + Sample CAP AVSS
3-Chan MUX
OUT VSS
AVSS
Figure 1. MPXY8021A Sensor Block Diagram
OPERATING MODES The device has several operating modes dependent on the applied voltages to the S1 and S0 pins as shown in Table 1. In all the modes listed the channel multiplexers, D/A Register, LFO, and the output pulse dividers will always be powered up as long as there is a voltage source connected to the VDD pin. When only the S0 pin is at a logic one the pressure measuring circuit in the device is powered up and the pressure output signal is connected to the sample capacitor through a multiplexer. When the S0 pin returns to the low state the multiplexer will first turn off to store the signal on the sample capacitor before powering down the measuring circuitry. When only the S1 pin is at a logic one the temperature measuring circuit in the device is powered up and the temperature output signal is connected to the sample capacitor through a multiplexer. When the S1 pin returns to the low state the multiplexer will first turn off to store the signal on the sample capacitor before powering down the measuring circuitry.
NOTE: All of the EEPROM trim bits will be powered up regardless of whether the pressure or temperature measuring circuitry is activated. NOTE: If the voltage on the S1 pin exceeds 2.5 times the voltage on the VDD pin the device will be placed into its Trim/Test Mode. NOTE: If the VDD supply source is switched off in order to reduce current consumption, it is important that all input pins be driven LOW to avoid powering up the device. If any input pin (S1, S0, DATA, or CLK) is driven HIGH while the VDD supply is switched off, the device may be powered up through an ESD protection diode. Such a case should be avoided. The effective source voltage of the device will be less than the applied voltage due to diode voltage drop. In addition, the entire source current will be drawn from the input pin.
MPXY8021A 2 Sensors Freescale Semiconductor
Table 1. Operating Modes
Circuitry Powered S1 S0 Operating Mode Pressure Measure System OFF ON OFF OFF Temp Measure System OFF OFF ON OFF A/D Output Comp. OFF OFF OFF ON LFO Oscill. ON ON ON ON Serial Data Counter
0 0 1 1
0 1 0 1
Standby/Reset Measure Pressure Measure Temperature Output Read
ACTIVE RESET RESET ACTIVE
PIN FUNCTIONS The following paragraphs give a description of the general function of each pin. VDD and VSS Pins Power is supplied to the control IC through VDD and VSS. VDD is the positive supply and VSS is the digital and analog
MPXY8021A VDD 0.1 F VSS
ground. The control IC operates from a single power supply. Therefore, the conductors to the power supply should be connected to the VDD and VSS pins and locally decoupled as shown in Figure 2.
To Other VDD Loads VDD To Power Supply VSS To Other VSS Returns
Figure 2. Recommended Power Supply Connections
OUT Pin The OUT pin normally provides a digital signal related to the voltage applied to the voltage comparator and the threshold level shifted into an 8-bit register from an external device. When the device is placed in the standby mode the
OUT
OUT pin is driven high and will be clocked low when an overflow is detected from a clock divider (divide by 16384) driven by the LFO. This allows the OUT pin to wake up an external device such as an MCU.
2/f LFO
2/f LFO
Operation
Measure
Standby
Measure 3 Sec
Wake Up
Figure 3. Pulse on OUT Pin During Standby Mode
RST Pin The RST pin is normally driven high and will be clocked low when an overflow is detected from total clock divider (divide by 16,777,216) driven by the LFO. This allows the RST pin to reset an external device such as an MCU. This pulse will appear on the RST pin approximately every 52
minutes regardless of the operating mode of the device. The pulse lasts for two cycles of the LFO oscillator as shown in Figure 4. Since the RST pin is clocked from the same divider string as the OUT pin, there will also be a pulse on the OUT pin when the RST pin pulses every 52 minutes.
MPXY8021A Sensors Freescale Semiconductor 3
OUT RST
2/f LFO 2/f LFO
Standby
3 Sec 52 Minutes
Figure 4. Pulse on RST Pin S0 Pin The S0 pin is used to select the mode of operation as shown in Table 1. The S0 pin contains an internal Schmitt trigger as part of its input to improve noise immunity. The S0 pin has an internal pull-down device in order to provide a low level when the pin is left unconnected. S1 Pin The S1 pin is used to select the mode of operation, as shown in Table 1. The S1 pin contains an internal Schmitt trigger as part of its input to improve noise immunity. This pin has an internal pull-down device to provide a low level when the pin is left unconnected. The S1 pin also serves the purpose of enabling factory trim and test of the device. The higher VPP programming voltage for the internal EEPROM trim register is also supplied through the S1 pin. DATA Pin The DATA pin is the serial data in (SDI) function for setting the threshold of the voltage comparator. The DATA pin contains an internal Schmitt trigger as part of its input to improve noise immunity. This pin has an internal pull-down device to provide a low level when the pin is left unconnected. Table 2. D/A Threshold Bit Assignment
Function LSB Bit Weight 1 2 4 Voltage Comparator Threshold Adjust (8 bits) 8 16 32 64 MSB 128 Data Bit D0 D1 D2 D3 D4 D5 D6 D7
CLK Pin The CLK pin is used to provide a clock used for loading and shifting data into the DATA pin. The data on the DATA pin is clocked into a shift register on the rising edge of the CLK pin signal. The data is transferred to the D/A Register on the eighth falling edge of the CLK pin. This protocol may be handled by the SPI or SIOP serial I/O function found on some MCU devices. The CLK pin contains an internal Schmitt trigger as part of its input to improve noise immunity. The CLK pin has an internal pull-down device to provide a low level when the pin is left unconnected. Output Threshold Adjust The state of the OUT pin is driven by a voltage comparator whose output state depends on the level of the input voltage on the sample capacitor and the level of an adjustable 8-bit threshold voltage. The threshold is adjusted by shifting data bits into the D/A Register (DAR) via the DATA pin while clocking the CLK pin. The timing of this data is shown in Figure 5. Data is transferred into the serial shift register on the rising edge of the CLK pin. On the falling edge of the 8th clock the data in the serial shift register is latched into the parallel DAR register. The DAR remains powered up whenever VDD is present. The serial data is clocked into the DATA pin starting with the MSB first. This sequence of threshold select bits is shown in Table 2.
MPXY8021A 4 Sensors Freescale Semiconductor
An analog to digital (A/D) conversion can be accomplished with eight (8) different threshold levels in a successive approximation algorithm; or the OUT pin can be set to trip at some alarm level. The voltage on the sample capacitor will maintain long enough for a single 8-bit conversion, but may need to be refreshed with a new measured reading if the read interval is longer than the specified hold time, tSH. The counter that determines the number of clock pulses into the device is reset whenever the device is placed into the Measure Pressure or Measure Temperature Modes. This provides a means to reset the data transfer count in case the
clock stream is corrupted during a transmission. In these two modes the DATA and CLK pins should not be clocked to reduce noise in the captured pressure or temperature data. Any change in the DAR contents should be done during the Standby or Output Read Modes. Both the serial bit counter and the state of the DAR are undefined following power up of the device. The serial bit counter can be reset by cycling either the SO pin or the S1/ VPP pin to a high level and then back low. The DAR can then be reset to the lowest level by holding the DATA pin low while bursting the CLK pin with eight (8) clock pulses.
1 CLK Data MSB BIT6
2
3
4
5
6
7
8
BIT5
BIT4
BIT3
BIT2
BIT1
LSB
Serial Data
MSB
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
LSB
DAR Load *
DAR * (*) Denotes Internal Signal
Data
Figure 5. Serial Data Timing Pressure Sensor Output The pressure channel compares the output of its analog measurement circuit to the D/A reference voltage. The device is calibrated at two different nominal values depending on the calibration option. Temperature Sensor Output The temperature channel compares the output of a positive temperature coefficient (PTC) resistor driven by a switched current source. The current source is only active when the temperature channel is selected. APPLICATIONS Suggested application example is shown in Figure 6.
Optional
+
Motion Sense
VDD
S1 S0 Data State Machine or MCU RF Transmitter
3.0 V MPXY8021A Sensor
0.1 F
CLK RST
VSS
OUT
Figure 6. Application Example
MPXY8021A Sensors Freescale Semiconductor 5
ELECTRICAL SPECIFICATIONS Maximum ratings are the extreme limits to which the device can be exposed without permanently damaging it. The device contains circuitry to protect the inputs against damage Table 3. Maximum Ratings
Rating Supply Voltage Short Circuit Capability (all pins excluding VDD and VSS) Maximum High Voltage for 5 minutes Minimum Low Voltage for 5 minutes Substrate Current Injection Current from any pin to VSS -0.3 VDC) Electrostatic Discharge Human Body Model (HBM) Charged Device Model (CDM) Machine Model (MM) Storage Temperature Range Standard Temperature Range
from high static voltages; however, do not apply voltages higher than those shown in the table below. Keep VIN and VOUT within the range VSS (VIN or VOUT) VDD.
Symbol VDD VSC VSC
Value -0.3 to +4.0
Unit V
VDD VSS
V V
ISUB
600
A
VESD VESD VESD
1000 1000 200
V V V
Tstg
-40 to +150
C
Table 4. Operating Range The limits normally expected in the application which define range of operation.
Characteristic Supply Voltage Operating Temperature Range Standard Temperature Range Pressure Operating Range MPXY8021A Supply Current Drain Standby Mode -40C to +85C +85C to +100C +100C to +125C Read Mode -40C to +125C Measure Temperature Mode -40C to +125C Measure Pressure Mode -40C to +10C +10C to +60C +60C to +125C Symbol VDD TA P637.5 Min 2.1 Typ 3.0 Max 3.3 TH +125 Units V C
-40
50
TL
--
--
637.5
kPa
ISTBY ISTBY ISTBY IREAD ITEMP IPRESS IPRESS IPRESS
-- -- --
0.6 0.8 1.5
0.9 1.2 2.2
A A A
--
400
600
A
--
400
600
A
-- -- --
1400 1300 1200
1800 1700 1700
A A A
MPXY8021A 6 Sensors Freescale Semiconductor
Table 5. Electrical Characteristics +2.1 V VDD +3.6 V, TL TA TH, unless otherwise specified
Characteristic Output High Voltage DATA, OUT, RST (ILoad = 100 A) Output Low Voltage DATA, OUT, RST (ILoad = -100 A) Input High Voltage S0, S1, DATA, CLK Input Low Voltage S0, S1, DATA, CLK Input Hysteresis (VIH -- VIL) S0, S1, DATA, CLK Input Low Current (at VIL) S0, S1, DATA, CLK Input High Current (at VIH) S0, S1, DATA, CLK Temperature Measurement (+2.1 V VDD < +2.5 V) D/A Conversion Code at -40C D/A Conversion Code at -20C D/A Conversion Code at 25C D/A Conversion Code at 70C D/A Conversion Code at 100C D/A Conversion Code at 120C D/A Conversion Code at 125C Temperature Measurement (+2.5 V VDD +3.0 V) D/A Conversion Code at -40C D/A Conversion Code at -20C D/A Conversion Code at 25C D/A Conversion Code at 70C D/A Conversion Code at 100C D/A Conversion Code at 120C D/A Conversion Code at 125C Temperature Measurement (+3.0 V < VDD +3.6 V) D/A Conversion Code at -40C D/A Conversion Code at -20C D/A Conversion Code at 25C D/A Conversion Code at 70C D/A Conversion Code at 100C D/A Conversion Code at 120C D/A Conversion Code at 125C Temperature Sensitivity at 25C Approximate Temperature Output Response Symbol VOH VOL VIH VIL VHYS IIL IIH T-40 T-20 T25 T70 T100 T120 T125 T-40 T-20 T25 T70 T100 T120 T125 T-40 T-20 T25 T70 T100 T120 T125 Min VDD -0.8 -- Typ -- Max -- Units V
--
0.4
V
0.7 x VDD VSS 100
--
--
V
--
0.3 x VDD --
V
200
mV A A (2)
-5 -5
34 52 97 154 203 240 249
-25 -35
42 57 102 163 214 252 255
-100 -140
51 67 107 172 225 255 255
counts counts counts counts counts counts counts
36 52 97 155 204 241 249
42 57 102 163 214 252 255
50 64 107 171 224 255 255
counts counts counts counts counts counts counts
36 52 97 154 203 240 249 --
42 57 102 163 214 252 255 0.80
49 64 107 172 225 255 255
counts counts counts counts counts counts counts C/bit counts
OUT = 74.75 + 0.075 x Ta + 0.0041 x Ta^2
MPXY8021A Sensors Freescale Semiconductor 7
14 12 10
Temperature Error (C)
8 6 4 2 0 -40 -20 0 20 40 60 80 100 120
Temperature (C)
Figure 7. Temperature Error vs Temperature at VDD = 3.0 V Table 6. Control Timing +2.1 V VDD +3.6 V, TL TA TH, unless otherwise specified.
Characteristic HFO Measurement Clock Frequency LFO Wake Up Clock Frequency Ta = -40C, +2.1 V VDD +3.6 Ta = +25C, +2.1 V VDD +3.6 Ta = +125C, +2.1 V VDD +3.6 Wake Up Pulse Pulse Timing Pulse Width Reset Pulse Pulse Timing Pulse Width Minimum Setup Time (DATA edge to CLK rise) Minimum Hold Time (CLK rise to DATA change) Measurement Response Time Recommended time to hold device in measurement mode Temperature Pressure Read Response Time (see Figure 8) From 90% VDD on S0 to OUT less than VOL or greater than VOH Sample Capacitor Discharge Time From initial full scale D/A count (255) to drop 2 counts (253) Symbol fHF fLF fLF fLF tWAKE tWPW tRESET tRPW tSETUP tHOLD Min 100 Typ 135 Max 150 Units kHz
3300 3900 3800
5400 5400 5300
8000 7700 7000
Hz Hz Hz
-- --
16384 2
-- --
LFO clocks LFO clocks
-- -- 100 100
16,777,216 2 -- --
-- -- -- --
LFO clocks LFO clocks nSec nSec
tTMEAS tPMEAS tREAD tSH
-- --
200 500
-- --
Sec Sec Sec
--
50
100
20 VDD 6.32 k
--
--
mSec
Test Point 50 pF 10.91 k
Figure 8. Control Timing Test Load for OUT and RST Pins MPXY8021A 8 Sensors Freescale Semiconductor
SENSOR CHARACTERISTICS (MPXY8021A)
PRESSURE TRANSFER FUNCTION kPa = 2.5 x Output (Pressure Error) Output = 8-bit digital pressure measurement (between 0-255) Pressure Error (kPa): 50 kPa P < 250 kPa
T[C] \ VDD[V] 2.1 72.5 57.5 57.5 57.5 57.5 72.5 95.0 2.5 72.5 57.5 57.5 57.5 57.5 72.5 92.5 2.7 35.0 30.0 25.0 25.0 27.5 37.5 57.5 3.0 35.0 30.0 25.0 25.0 25.0 37.5 47.5 3.3 35.0 30.0 25.0 25.0 25.0 37.5 47.5 3.6 37.5 35.0 27.5 27.5 27.5 37.5 47.5
-40 -20
0 25 70 100 125
Pressure Error (kPa): 250 kPa P 450 kPa
T[C] \ VDD[V] 2.1 40.0 32.5 30.0 30.0 35.0 40.0 62.5 2.5 40.0 25.0 25.0 25.0 25.0 40.0 60.0 2.7 30.0 20.0 10.0 7.5 10.0 25.0 35.0 3.0 30.0 20.0 10.0 7.5 7.5 25.0 35.0 3.3 30.0 20.0 10.0 7.5 7.5 25.0 35.0 3.6 35.0 25.0 15.0 15.0 15.0 30.0 35.0
-40 -20
0 25 70 100 125
Pressure Error (kPa): 450 kPa < P 637.5 kPa
T[C] \ VDD[V] 2.1 70.0 55.0 55.0 55.0 55.0 70.0 90.0 2.5 70.0 55.0 55.0 55.0 55.0 70.0 90.0 2.7 40.0 30.0 22.5 22.5 25.0 32.5 47.5 3.0 40.0 30.0 22.5 22.5 25.0 32.5 47.5 3.3 40.0 30.0 22.5 22.5 25.0 32.5 47.5 3.6 40.0 35.0 35.0 35.0 35.0 40.0 52.5
-40 -20
0 25 70 100 125
Areas marked in grey indicate the typical operating range.
MPXY8021A Sensors Freescale Semiconductor 9
PRESSURE ERROR
30 25 20 15 10 5 0
Error [kPa]
50
100
150
200
250
300 Pressure [kPa]
350
400
450
500
550
600
Figure 9. Pressure Error vs Pressure at T = 25C, 2.7 V VDD 3.3 V
35 30 25 20 Error [kPa] 15 10 5 0 2.1 2.3 2.5 2.7 VDD [V] 2.9 3.1 3.3 3.5
Figure 10. Pressure Error vs VDD at T = 25C, 250 kPa P 450 kPa
40
30 Error [kPa]
20
10
0 -40 -20 0 20 40 Temperature [C] 60 80 100 120
Figure 11. Pressure Error vs Temperature at VDD = 3.0 V, 250 kPa P 450 kPa
MPXY8021A 10 Sensors Freescale Semiconductor
MECHANICAL SPECIFICATIONS Maximum ratings are the extreme limits to which the device can be exposed without permanently damaging it. Table 7. Maximum Ratings
Rating Maximum Pressure(1) Centrifugal Force Effects (3 axis) Pressure measurement change less than 1% FSS Unpowered Shock (three sides, 0.5 mSec duration) 1. Tested for 5 minutes at 25C.
Keep VIN and VOUT within the range VSS (VIN or VOUT) VDD.
Symbol pmax
Value 1400
Unit kPa(1)
gCENT gshock
2000 2000
g g
MEDIA COMPATIBILITY The Daytona sensor has been designed with the tire pressure application in mind. As such, it has been tested to a variety of media typical of the tire environment. The filter provides limited, but not universal, media protection. The customer must ensure media compatibility of the Daytona sensor in their application. In particular, it is strongly recommended that the customer design the application such that media does not come in direct contact with the sensor. Module housing design and orientation will play a role in
protecting the sensor from direct media exposure. In the event that media does come in contact with the sensor it is desirable that the application minimize the duration and severity of exposure. Media may be forced through the filter by mechanical aspects of the application such as g-forces or rapid pressurization of the tire. In addition, the customer maintains responsibility to design and carry out reliability testing verifying compatibility of the Daytona sensor with their module design and application.
MPXY8021A Sensors Freescale Semiconductor 11
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 1352-03 ISSUE C SUPER SMALL OUTLINE PACKAGE
MPXY8021A 12 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 1352-03 ISSUE C SUPER SMALL OUTLINE PACKAGE
MPXY8021A Sensors Freescale Semiconductor 13
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 1352-03 ISSUE C SUPER SMALL OUTLINE PACKAGE
MPXY8021A 14 Sensors Freescale Semiconductor
How to Reach Us:
Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com
Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. FreescaleTM and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc. 2006. All rights reserved.
MPXY8021A Rev. 2 02/2006


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